What is the difference in performance between internal and external memory for SH2 ?
In general the faster and wider the memory is, the higher the CPU performance. MIPs figures are always quoted for internal memory where true 1 clock per instruction can be achieved. The SH fetches 2 16bit instructions at a time which means that every other instruction does not require an instruction fetch. The majority or bus accesses in an SH based system will normally be instruction fetches hence the best speedup can be achieved by increasing code memory speed. Generally the number of clocks per instruction can be approximated by the following equation. Clocks = ((n*32 / w ) + 1) / 2 Where, w = width of code space and n = number of states to access this memory. e.g 16bit 2 state memory will take ((2 x 32/16 ) +1) / 2 = 2.5 clocks per instruction on average.