How do I extend data-valid-period over /WR signal during a bus cycle ?

Latest Updated:03/18/2009

Question:

How can I extent the data-valid-period beyond the /WR signal during a bus cycle ?

The data hold time of a write operation can be extended beyond a /WR signal using the /CS Assert Period Extension Function. The function is used to prevent extension of the /RD or /WR signal assert period beyond the length of the active /CS signal. Idle cycles before and after the usual bus cycle are inserted, which leads to the effect that the valid data is held over the idle cylce (idle cycle after the usual bus cycle).
Suitable Products
 SH7144 Series SH7047 Series SH7046 Series SH7040 Series
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