RAM data hold is not guaranteed in the case of reset during normal operation.
Since reset is applied asynchronously to normal operation, a reset may be applied while writing to RAM is in progress.
In this case, writing to RAM may not be performed normally.
Therefore, the RAM data cannot be guaranteed if a reset is applied during normal operation.
This is a problem of the timing at which reset is applied.
No problem occurs when a reset is applied while RAM is not being written.
However, if a reset is applied while RAM is being written, the width of the reset signal becomes smaller than the specified value, and the address may change while the write signal is on, resulting in data being written not only to the address that was being written, but also possibly to other addresses.