- Lower 5 bits of hexadecimal word data are placed in addresses 0-3FFF
- Upper 5 bits of hexadecimal word data are placed in addresses 4000-7FFF
Mask processing for 4500 Series MCUs will only work properly if the contents of the hexadecimal data file are the same as that of the Renesas 4-bit MCU Assembler ASM45. Accordingly, the HEX file contents must be the same as the contents of the HEX file below, as created with the ASM45.
1. Hexadecimal data is split between the upper and lower 5 bits, and output by the lower bits first, then the upper bits.
2. The lower 5 bits are placed in address 0000h to 3FFFh. The upper bits are placed in addresses 4000h to 7FFFh.
3. "1" is set to the upper 3 bits of each hexadecimal data.
|4500 Series ROM Ordering|
|720 Series ROM Ordering|
|38000 Series ROM Ordering|
|740/7450/7470 Series ROM Ordering|
|7600 Series ROM Ordering|
|7200 Series ROM Ordering|
|7770 Series ROM Ordering|
|M16C Family ROM Ordering|
|R8C Family ROM Programmed Shipment Ordering|
|QzROM Programmed Shipment Ordering|
|ASSP ROM Ordering|
|OSD Controller ROM Ordering|