For example, although P34, P35, P36, and P95 popts are used to control the E7, E8, E10T or E8a emulator for H8/38024, the contents of PDR of the rest ports such as P31 and P32 have the following restrictions.
The E7, E8, E10T or E8a emulator uses port3 and port9 signals for debugging control during a break. Since PDR is a register operated in a byte unit, it reads/writes PDR3 and PDR8 in per byte to get the E7, E8, E10T or E8a emulator to work. At the same time, the E7, E8, E10T or E8a control software saves the contents of original PDR immediately after a break. And it restores the value shortly before the program execution.
When a refreshment command of HDI is issued, the E7, E8, E10T or E8a control software only shows the contents that are saved immediately after the break on PC screen, and is not actually accessing PDR. Therefore, even if you change the state of an input pins during a break, the contents are not be updated. A value is set to PDR of an actual microcomputer however.
As well, the E7, E8, E10T or E8a control software updates a value on a screen when writing in PDR in an I/O register window and a memory window similarly however, the value is actually updated in PDR just before program execution.